Opportunity
Job Description
The Design Verification Engineer will verify ASIC and FPGA designs created by Boeing Electronic Products. The engineer will develop simulation testbenches, verification plans, reusable components and coverage methods to confirm that digital devices satisfy their requirements. The role includes RTL debugging, regression analysis and close collaboration with design engineers throughout the electronic-hardware lifecycle.
Responsibilities
• Develop verification plans from digital-hardware requirements.
• Build SystemVerilog simulation testbenches.
• Create test sequences, assertions, monitors and scoreboards.
• Execute functional and regression simulations.
• Debug RTL and verification-environment failures.
• Analyse code and functional coverage.
• Document defects and coordinate corrections with design engineers.
• Support ASIC, FPGA and system-on-chip verification.
• Maintain traceability between requirements, tests and results.
• Participate in design and verification reviews.
Eligibility
• Bachelor’s degree with at least two years of relevant ASIC, FPGA or system-on-chip verification experience, or a master’s degree with relevant project or coursework experience.
• Understanding of digital-design verification fundamentals.
• Experience using SystemVerilog for testbench development and RTL debugging.
• Ability to obtain a United States Secret security clearance.
• United States citizenship is required.
• Employer will not provide employment-visa sponsorship.
Required Skills
Preferred Skills
Application Instructions
Apply through Boeing’s official job page and provide details of SystemVerilog, RTL debugging and digital verification experience.
Apply through UCO Aero
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